I am an Associate Professor in the Department of Computer Science at Norwegian University of Science and Technology (NTNU). I am affiliated with Computer Architecture Lab (CAL) in the Computing Unit. Before joining NTNU, I was a post-doctoral researcher at Uppsala University, Sweden and the University of Edinburgh, UK. I received my PhD from UPC, Barcelona in 2014. My current research focuses on improving the efficiency of large-scale datacenters through improvement in processor microarchitecture and memory systems. My previous work explored hardware/software co-designed processors (think of Nvidia Denver) as an energy-efficient alternative to conventional (hardware only) processors. I have also investigated dynamic code translation and optimizations, especially vectorization.

Work Experience

  • Uppsala University, Sweden. Postdoctoral Researcher. (Aug 2017 - May 2018).
    • Investigated energy efficient microarchitecture designs.

  • University of Edinburgh, UK. Research Associate. (Jan 2015 - June 2017).
    • Investigated specialized core and memory architectures for server processors.

  • Intel Barcelona Research Center, Intel Labs. Graduate Intern Researcher. (Oct 2013 - May 2014).
    • Worked on memory controllers for emerging memory technologies.
    • Received Intel Spontaneous Level II/Excellence Award.

  • Birla Institute of Technology and Science (BITS), Pilani, India. Assistant Lecturer. (Jan 2009 - July 2009).
    • Co-taught a course on Microprocessor Programming and Interfacing to a class of more than 250 students.

  • Birla Institute of Technology and Science (BITS), Pilani, India. Teaching Assistant. (Sept 2006 - July 2008).
    • Preparing, conducting and evaluating tutorials and lab sessions for undergraduate courses including Digital Electronics and Microprocessors, Microelectronic Circuits, Electronic Devices and Integrated Circuits, etc.

  • Himachal Futuristic Communication Ltd, India. Graduate Engineer Trainee. (July 2005 - July 2006).
    • Video headend and optical fiber network installation/operation as a part of Internet Protocol TV project.
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Professional Services

  • Program Committee: HPCA(2024, 2023, 2022), DATE (2024), MICRO (2023), YArch@ASPLOS(2022), IPDPS(2019), ICPP(2017), MCC(2017)

  • External Review Committee: MICRO (2022), ISCA(2021, 2020), HPCA(2019)

  • Organizing Committee: HPCA 2024(Finance chair)

  • Tutorial Review Committee: SC (2022)

  • Journal Review: IEEE Transactions on Computers (TC), ACM Transactions on Computer Systems (TOCS), ACM Transactions on Architecture and Code Optimization (TACO), IEEE Computer Architecture Letters (CAL), Elsevier Microprocessors and Microsystems, Technical Gazette

  • Co-developer of DARCO, an infrastructure for research on HW/SW co-designed Virtual Machines.